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AUTHOR(S): Rajesh Mehra, Lajwanti Singh
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TITLE Design and Simulation of Decimator for Digital Signal Processing |
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ABSTRACT Decimator is a significant sampling device utilized for multi-rate applications in digital signal handling. Multirate signal processing demands high performance decimator with less resources and computation requirements for cost effectiveness. So, an efficient decimator has been designed in this paper to lessen the resources and computation requirements. The multistage decimator models have been designed and analyzed utilizing three distinct procedures. The performance of designed decimators is compared in terms of required number of multipliers, adders, multiplication per input sample (MPIS) and addition per input sample (APIS). It has been seen that the performance of all the designs are according to characterized details however number of required resources and computations varies significantly. The Nyquist design implementation lessens multiplier and adder utilization by 64.25 % and 64.68 % individually. This proposed design likewise shows decrease in MPIS and APIS by 53.85 % and 56.54 % separately when contrasted with half band design to provide high-performance cost-effective solution for multirate applications. |
KEYWORDS Addition Per Input Sample, Digital Signal Processing, Decimator, Finite Impulse Response Filter, Half Band Filter, Multiplication Per Input Sample, Nyquist Filter, Multi Rate Filter |
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Cite this paper Rajesh Mehra, Lajwanti Singh. (2024) Design and Simulation of Decimator for Digital Signal Processing. International Journal of Signal Processing, 9, 1-6 |
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