Abstract: Image compression is a method of reducing the image size by reducing the redundancy between pixels in an image without degrading the quality of image so that it can store more images in a given amount of disk or memory space and also it tends to reduce the time required to send the images over the network. Many hardware efficient techniques exists for image compression, inspired from it, this paper presented an image compression technique based on the pixel-wise fidelity and its FPGA implementation. Proposed method is used to reduce bit rate of the pixels for better image compression by using angular transformation. This paper presents a hardware efficient FPGA architecture using angular domain concept based on CORDIC algorithm. In this paper, the architecture is first simulated in MATLAB for calculating PSNR, MMSE and compression ratio and then it simulated and synthesized using Xilinx ISE tool and verify the parameters such as area, power and delay required for compressing the image with visual appearance of the output compressed image finally the codes are targeted onto suitable FPGA.
Keywords: Image compression, Angular transformation, VHDL, FPGA, CORDIC, Fidelity, Bit plane slicing, MMSE, PSNR, RTL.
Cite this paper
Pravin B.Pokle, N.G.Bawane. (2017) Still Image Compression using Angular Domain: Analysis and FPGA implementation. International Journal of Signal Processing, 2 , 145-153

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